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9.2 Philips EVP

The Embedded Vector Processor (EVP) developed by Philips is a VLIW based scalable SIMD architecture designed to support multiple 3G standards[18]. The EVP includes several specialized function units such as a shuffle unit, an intra-vector unit that supports intra-vector operations, and a code generation unit that supports CDMA code generation. It also includes an address calculation unit that supports an extensive set of addressing modes. The EVP exploits VLIW parallelism by providing the ability to issue five vector operations, four scalar operations, address updates and loop control operations simultaneously.



Binu K. Mathew, Ali Ibrahim